SDK • Hitting spin lock unsafe blocking when using SPI irq setup init

spin_lock_unsafe_blocking@0x100006f0 (c:\Users\mmadha\.pico-sdk\sdk\2.2.0\src\rp2_common\hardware_sync_spin_lock\include\hardware\sync\spin_lock.h:265)
spin_lock_blocking@0x100006f0 (c:\Users\mmadha\.pico-sdk\sdk\2.2.0\src\rp2_common\hardware_sync_spin_lock\include\hardware\sync\spin_lock.h:303)
irq_set_exclusive_handler@0x100006f0 (c:\Users\mmadha\.pico-sdk\sdk\2.2.0\src\rp2_common\hardware_irq\irq.c:235)
spi_irq_setup_init@0x10007b44 (c:\Users\mmadha\OneDrive - Transformers and Rectifiers Ltd\Desktop\bare_api\msc_file_explorer\hardware_processing\hardware_processing.c:114)
main@0x10000350 (user\bare_api\msc_file_explorer\app\main.c:103)

bool spi_irq_setup_init(void){    // Clear any pending SPI interrupts    hw_set_bits(&spi_get_hw(spi0)->icr, SPI_SSPICR_RTIC_BITS | SPI_SSPICR_RORIC_BITS);    // Clear interrupt mask    hw_clear_bits(&spi_get_hw(spi0)->imsc, SPI_SSPIMSC_BITS);    hw_clear_bits(&spi_get_hw(spi0)->imsc, SPI_SSPIMSC_RXIM_BITS);    // Enable desired SPI interrupt sources    hw_set_bits(&spi_get_hw(spi0)->imsc,                SPI_SSPIMSC_RTIM_BITS | SPI_SSPIMSC_RXIM_BITS | SPI_SSPIMSC_RORIM_BITS);    // Assign SPI0 IRQ handler **before enabling the IRQ**    irq_set_exclusive_handler(SPI0_IRQ, spi0_irq_handler);    irq_set_priority(SPI0_IRQ, 0);      // Lower priority    irq_set_enabled(SPI0_IRQ, true);    return irq_is_enabled(SPI0_IRQ);}

#if !PICO_NO_RAM_VECTOR_TABLE
spin_lock_t *lock = spin_lock_instance(PICO_SPINLOCK_ID_IRQ);
uint32_t save = spin_lock_blocking(lock);
__unused irq_handler_t current = irq_get_vtable_handler(num);
hard_assert(current == __unhandled_user_irq || current == handler);
set_raw_irq_handler_and_unlock(num, handler, save);
#else

Statistics: Posted by Maaz1 — Mon Feb 16, 2026 2:14 pm — Replies 0 — Views 39