Hello,
I have an uint8_t array and I need a lot of calculations done for masking stuff there.
So I created an uint64_t pointer to some arbitrary internal byte in the array and I do the masking on 8 bytes at once.
At least I thought.
Even the following program fails:
The MCU crashes (subsequent programming, console connection fails) and only two "address... " and the first "aligned..." line is printed:
In the RP2350 datasheet:
permit other unaligned accesses, and generate a fault if this is attempted" sentence mean that uint64_t operations are not supported on unaligned addresses? If so, is this mentioned anywhere?
ps: my actual code is a bit more complex, but that also fails
I have an uint8_t array and I need a lot of calculations done for masking stuff there.
So I created an uint64_t pointer to some arbitrary internal byte in the array and I do the masking on 8 bytes at once.
At least I thought.
Even the following program fails:
Code:
#include <stdio.h>#include "pico/stdlib.h"uint8_t testArray[256];int main(){ stdio_init_all(); for(int i=0; i<256; i++) testArray[i] = i; for(int i=15; i>0; i--) { // let's wait some for the console connection printf("%d ", i); sleep_ms(1000); } printf("\n"); int i=0; while (true) { uint64_t *b = (uint64_t *)&testArray[i]; printf("address: %08X, ", (uint32_t)b); uint64_t c = i * 256; uint64_t d = *b & c; printf("aligned on %d, result is: %016llx \n", i, d); sleep_ms(1000); i++; }}Code:
---- Opened the serial port COM14 ----3 2 1 address: 20007D5C, aligned on 0, result is: 0000000000000000 address: 20007D5D, Does the "Load/store double and load/store multiple instructions already support word aligned accesses, but do not3.7.4.3.2. Unaligned accesses
The Cortex-M33 processor supports unaligned accesses. They are converted into two or more aligned AHB transactions
on the C-AHB or S-AHB master ports on the processor.
Unaligned support is only available for load/store singles (LDR, LDRH, STR, STRH, TBH) to addresses in Normal
memory. Load/store double and load/store multiple instructions already support word aligned accesses, but do not
permit other unaligned accesses, and generate a fault if this is attempted. Unaligned accesses in Device memory are
not permitted and fault. Unaligned accesses that cross memory map boundaries are architecturally UNPREDICTABLE.
permit other unaligned accesses, and generate a fault if this is attempted" sentence mean that uint64_t operations are not supported on unaligned addresses? If so, is this mentioned anywhere?
ps: my actual code is a bit more complex, but that also fails
Statistics: Posted by dikdom — Thu Dec 18, 2025 8:53 pm — Replies 5 — Views 136