I'm working on enabling nvme access in u-boot, so far I have added two working drivers for the RESCAL and BRIDGE resets (Linux driver seems to use the bridge reset in place of a swinit reset) which seem to function correctly, I've gleaned the information from the Linux source too for getting PERST asserted and deasserted.
At this point in u-boot I can enum the connected devices, I can see my nvme drive on the first bus and what must be RP1 on the second bus but the headers from the BAR only have the first 8 bytes so there's only Device ID, Vendor ID, Status and Command.
I'm a newbie at PCIE so any information is good at this point. I think the devices are being clocked correctly and have some power since the first 8 bytes are being given and I did enable regulators and the regulator command and can see what I believe to be the two regulators providing power for these devices and their state as always active.
I didn't try enabling l1ss at this point, I wondered if the devices were hanging around in a low power state and even though I thought I had turned off l0ss and l1ss was there a limitation.
I did include the PLL munge pieces from the Linux driver btw, without this the bridge initialisation didn't work at all.
Any feedback I'm sure would help me immensely.
At this point in u-boot I can enum the connected devices, I can see my nvme drive on the first bus and what must be RP1 on the second bus but the headers from the BAR only have the first 8 bytes so there's only Device ID, Vendor ID, Status and Command.
I'm a newbie at PCIE so any information is good at this point. I think the devices are being clocked correctly and have some power since the first 8 bytes are being given and I did enable regulators and the regulator command and can see what I believe to be the two regulators providing power for these devices and their state as always active.
I didn't try enabling l1ss at this point, I wondered if the devices were hanging around in a low power state and even though I thought I had turned off l0ss and l1ss was there a limitation.
I did include the PLL munge pieces from the Linux driver btw, without this the bridge initialisation didn't work at all.
Any feedback I'm sure would help me immensely.
Statistics: Posted by iamasmith — Sun Sep 01, 2024 4:38 pm — Replies 0 — Views 24