Hi,
I'm trying to use the UART FIFO RX buffer to lessen the burden of receiving UART data. I can't seem to get the FIFO to work with the UART RX IRQ. With my setup I'm expecting to get an interrupt when the UART FIFO is 7/8th full. Instead I get an IRQ when the first byte comes in. I tried everything including confirming that I set the FIFO trigger level to 0b100 but with my understanding even if that's not set correctly I should be getting an interrupt at 4 bytes received, not 1. Below is my setup:
I'm trying to use the UART FIFO RX buffer to lessen the burden of receiving UART data. I can't seem to get the FIFO to work with the UART RX IRQ. With my setup I'm expecting to get an interrupt when the UART FIFO is 7/8th full. Instead I get an IRQ when the first byte comes in. I tried everything including confirming that I set the FIFO trigger level to 0b100 but with my understanding even if that's not set correctly I should be getting an interrupt at 4 bytes received, not 1. Below is my setup:
Code:
#define UART_TX_PIN PICO_DEFAULT_UART_TX_PIN#define UART_RX_PIN PICO_DEFAULT_UART_RX_PIN#define UART_ID uart0void on_uart_rx(void){while(uart_is_readable(UART_ID)){uint8_t ch = uart_getc(UART_ID);// Can we send it back?if(uart_is_writable(UART_ID)){// Change it slightly first!uart_putc(UART_ID, ch);}}}int main(){// Set up our UART with a basic baud rate.gpio_set_function(UART_TX_PIN, GPIO_FUNC_UART);gpio_set_function(UART_RX_PIN, GPIO_FUNC_UART);uart_init(uart0, 500000);uart_set_hw_flow(uart0, false, false);uart_set_format(uart0, 8, 1, UART_PARITY_NONE);// Now enable the UART to send interrupts - RX onlyuart_set_irq_enables(uart0, true, false);irq_set_exclusive_handler(UART0_IRQ, on_uart_rx);irq_set_enabled(UART0_IRQ, true);uart_set_fifo_enabled(uart0, true);hw_write_masked(&uart_get_hw(uart0)->ifls, 0b100 << UART_UARTIFLS_RXIFLSEL_LSB,UART_UARTIFLS_RXIFLSEL_BITS);// Set the fifo int to 7/8th fullwhile(1);}Statistics: Posted by cwillitb — Wed Aug 14, 2024 3:07 pm — Replies 0 — Views 8